1. Field of the Invention
The present invention relates to a ramp waveform generation device, an analog/digital conversion device, an imaging device and the control method of the imaging device, more particularly to a technology capable of being effectively applied to the digitalization and the like of an optically/electrically converted signal in an imaging device, such as a complementary metal oxide semiconductor (CMOS) image sensor and the like.
2. Description of the Related Art
Attention is focused on a CMOS image sensor since compared with a charge coupled device (CCD) image sensor, the CMOS image sensor is well matched with peripheral image processing circuits in a manufacturing process, operating voltage and the like, and in the CMOS image sensor, an imaging device, an image processing circuit, a controller and the like can be easily integrated on one chip.
Since in this CMOS image sensor, not only an optical/electrical conversion device but a conversion signal can also be amplified at each pixel level, the CMOS image sensor has an advantage of being resistant to noise in the transmission process of an optically/electrically converted signal. However, the CMOS image sensor has fixed pattern noise due to the uneven characteristic of an amplifier at each pixel level, which is a problem.
As the countermeasure, a configuration in which the same number of correlation double sampling (CDS) circuits and analog/digital conversion (ADC) circuits as that of columns are arrayed in parallel for each set of pixels in the column direction of a plurality of pixels two-dimensionally arrayed in the orthogonal row and column directions, that is, a configuration for reducing the fixed pattern noise by a so-called column ADC method, is known.
In this case, a reference voltage generation circuit for a CDS circuit and a reference voltage generation circuit for a ramp waveform generation circuit for inputting a ramp waveform signal to the ADC circuit are separately provided for the following reason.
Specifically, since the output of the reference voltage generation circuit for a CDS circuit gives reference potential to a capacitor device for clamping/sampling the reset noise of a pixel and an optically/electrically converted signal, the reference voltage generation circuit for a CDS circuit must always output a constant voltage. However, since the output of the reference voltage generation circuit for a ramp waveform generation circuit is connected to a large external capacitor device in order to realize a ramp waveform, and its voltage level instantaneously drops when this capacitor device outputs a ramp waveform. Therefore, it is preferable to independently provide each of the CDS circuit and the ramp waveform generation circuit with a reference voltage generation circuit.
By fixing the output potential of the reference voltage generation circuit on the CDS circuit side and initially setting the output potential of the reference voltage generation circuit on the ramp waveform generation circuit side to a prescribed value, the digital conversion accuracy of an optically/electrically converted signal outputted from the CDS circuit using a ramp waveform signal can be maintained.
However, the output potential of the reference voltage generation circuit on the ramp waveform generation circuit side is initially set assuming that the output potential of the reference voltage generation circuit on the CDS circuit side is fixed. Therefore, if the output potential on the CDS circuit side fluctuates for some reason, an error occurs in the AD conversion process, which is another problem.
As to the ramp waveform generation circuit, as disclosed in Patent Reference 1, there is a technology for compensating for the inclination of a ramp waveform due to temperature fluctuations by using a constant-current source composed of an operational amplifier, a transistor, an external resistor with a small temperature coefficient and a current mirror circuit together as a reference power source and charging or discharging a capacity for generating a ramp waveform. However, in this technology, the above-mentioned problem of the ramp waveform generation circuit configured to be connected to both the CDS circuit and the ADS circuit is not recognized at all.
Although Patent Reference 2 discloses a ramp waveform generation circuit composing a DC/DC converter (switching regulator), there is no reference to the above-mentioned problem.    Patent Reference 1: Japanese Patent Application No. 4-48812    Patent Reference 2: Japanese Patent Application No. 11-332222